Design for manufacturability and yieldSTROJWAS, A. J.Microelectronics. 1990, Vol 21, Num 2, pp 53-66, issn 0026-2692, 14 p.Article

A statistical design rule developerRAZDAN, R; STROJWAS, A. J.IEEE transactions on computer-aided design of integrated circuits and systems. 1986, Vol 5, Num 4, pp 508-520, issn 0278-0070Article

A methodology for optimal test structure design for statistical process characterization and diagnosisIHAO CHEN; STROJWAS, A. J.IEEE transactions on computer-aided design of integrated circuits and systems. 1987, Vol 6, Num 4, pp 592-600, issn 0278-0070Article

Numerical integral method for diffusion modelingXIAOWEI TIAN; STROJWAS, A. J.IEEE transactions on computer-aided design of integrated circuits and systems. 1991, Vol 10, Num 9, pp 1110-1124, issn 0278-0070Article

A new approach to hierarchical and statistical timing simulationsBENKOSKI, J; STROJWAS, A. J.IEEE transactions on computer-aided design of integrated circuits and systems. 1987, Vol 6, Num 6, pp 1039-1052, issn 0278-0070Article

Realistic yield simulation for VLSIC structural failuresIHAO CHEN; STROJWAS, A. J.IEEE transactions on computer-aided design of integrated circuits and systems. 1987, Vol 6, Num 6, pp 965-980, issn 0278-0070Article

Statistical control of VLSI fabrication processessMOZUMDER, P. K; STROJWAS, A. J.IEEE transactions on components, hybrids, and manufacturing technology. 1991, Vol 14, Num 3, pp 467-475, issn 0148-6411Conference Paper

Statistical control of VLSI fabrication processesMOZUMDER, P. K; STROJWAS, A. J.Proceedings of the IEEE. 1990, Vol 78, Num 2, pp 436-455, issn 0018-9219, 20 p.Article

IC manufacturing diagnosis based on statistical analysis techniquesKIBARIAN, J. K; STROJWAS, A. J.IEEE transactions on components, hybrids, and manufacturing technology. 1992, Vol 15, Num 3, pp 317-321, issn 0148-6411Conference Paper

An efficient algorithm for parametric fault simulation of monolithic IC'sSTROJWAS, A. J; DIRECTOR, S. W.IEEE transactions on computer-aided design of integrated circuits and systems. 1991, Vol 10, Num 8, pp 1049-1058, issn 0278-0070Article

VLSI yield prediction and estimation: a unified frameworkMALY, W; STROJWAS, A. J; DIRECTOR, S. W et al.IEEE transactions on computer-aided design of integrated circuits and systems. 1986, Vol 5, Num 1, pp 114-130, issn 0278-0070Article

Modeling optical microscope images of integrated-circuit structuresCHI-MIN YUAN; STROJWAS, A. J.Journal of the Optical Society of America. A, Optics and image science. 1991, Vol 8, Num 5, pp 778-790, issn 0740-3232Article

A pattern recognition based method for IC failure analysisSTROJWAS, A. J; DIRECTOR, S. W.IEEE transactions on computer-aided design of integrated circuits and systems. 1985, Vol 4, Num 1, pp 76-92, issn 0278-0070Article

Asymptotic waveform evaluation for transient analysis of 3-D interconnect structuresKUMASHIRO, S; ROHRER, R. A; STROJWAS, A. J et al.IEEE transactions on computer-aided design of integrated circuits and systems. 1993, Vol 12, Num 7, pp 988-996, issn 0278-0070Article

Modeling optical equipment for wafer alignment and line-width measurementCHI-MIN YUAN; STROJWAS, A. J.IEEE transactions on semiconductor manufacturing. 1991, Vol 4, Num 2, pp 99-110, issn 0894-6507Article

Using spatial information to analyze correlations between test structure dataKIBARIAN, J. K; STROJWAS, A. J.IEEE transactions on semiconductor manufacturing. 1991, Vol 4, Num 3, pp 219-225, issn 0894-6507Article

A methodology for worst-case analysis of integrated circuitsNASSIF, S. R; STROJWAS, A. J; DIRECTOR, S. W et al.IEEE transactions on computer-aided design of integrated circuits and systems. 1986, Vol 5, Num 1, pp 104-113, issn 0278-0070Article

Efficient macromodeling of defect propagation/growth mechanisms in VLSI fabricationXIAOLEI LI; STROJWAS, A. J; REDDY, M et al.IEEE transactions on semiconductor manufacturing. 1998, Vol 11, Num 4, pp 537-545, issn 0894-6507Conference Paper

In-line yield prediction methodologies using patterned wafer inspection informationNURANI, R. K; STROJWAS, A. J; MALY, W. P et al.IEEE transactions on semiconductor manufacturing. 1998, Vol 11, Num 1, pp 40-47, issn 0894-6507Conference Paper

Electrical isolation design rule for GaAs integrated circuits fabricated on semi-insulating substratesJYH-CHWEN LEE; STROJWAS, A. J; SCHLESINGER, T. E et al.I.E.E.E. transactions on electron devices. 1991, Vol 38, Num 3, pp 447-454, issn 0018-9383Article

Effective excursion detection by defect type grouping in in-line inspection and classificationSHINDO, W; WANG, E. H; AKELLA, R et al.IEEE transactions on semiconductor manufacturing. 1999, Vol 12, Num 1, pp 3-10, issn 0894-6507Conference Paper

Defect inspection technologies to meet the challenges of advanced CMP processesREYNOLDS, J; SWECKER, A. L; STROJWAS, A. J et al.Solid state technology. 1998, Vol 41, Num 3, pp 39-44, issn 0038-111X, 4 p.Article

In-line defect sampling methodology in yield management : An integrated frameworkNURANI, R. K; AKELLA, R; STROJWAS, A. J et al.IEEE transactions on semiconductor manufacturing. 1996, Vol 9, Num 4, pp 506-517, issn 0894-6507Conference Paper

Monitoring multistage integrated circuit fabrication processesRAO, S; STROJWAS, A. J; LEHOCZKY, J. P et al.IEEE transactions on semiconductor manufacturing. 1996, Vol 9, Num 4, pp 495-505, issn 0894-6507Conference Paper

METROPOLE-3D : A rigorous 3D topography simulatorXIAOLEI LI; LUCAS, K. D; SWECKER, A. L et al.SPIE proceedings series. 1998, pp 717-728, isbn 0-8194-2779-9Conference Paper